PCTuning fórum

Rory Read tvrdí, že výchova nástupce (nástupkyně) byla pro něj jedním z pracovních úkolů... což samozřejmě ještě něříká, že ta změna v tenhle konkrétní okamžik byla konkrétně plánovaná na tento konkrétní okamžik a nepřišlo do toho něco jiného (třeba že Read dostal odjinud nabídku, která se mu líbila víc, než zůstat v AMD).

Na Tech Reportu jsem četl, že jim nějaký insider říkal už na CES 2014, že Lisa Su spěje k tomu, být ředitelkou. V létě ji povýšili do role COO, v které předtím nikco nebyl, a po ní v ní asi zase nikdo nebude. Takže to vypadá, že ta pozice byla taková přípravka na šéfování. Ale opět, zda i to načasování bylo plánované, to z toho jasné není. (Podle toho "zdroje" z CES se prý měli vyměnit do půl roku, což tak úplně nevyšlo.)

AMD misses earnings targets, announces layoffs , 7% of workforce to go

hadas píše:caute nejak se v tomnevyznam planuje AMD nejake procesory na stolni pc pro hrace ?

del42sa píše:Asustek, AMD said to strengthen partnership

http://www.digitimes.com/news/a20141014PD203.html

Yes, GlobalFoundries is hot on FD-SOI. Yes, Qualcomm’s interested in it for IoT. Yes, ST’s got more amazing low-power FD-SOI results. These are just some of the highlights that came out of the Low Power Conference during Semicon Europa in Grenoble, France (7-9 October 2014).

Next year it will be in Dresden, and alternate between Grenoble and Dresden from then on. And now we know that interesting things are promised for FDSOI in Dresden, we’ll certainly look forward to 2015.

FD-SOI will become a mainstream process technology, reckons Satish Bagalkotkar, founder, chairman and CEO of San Jose chip designer Synapse Design.

Synapse’s design flow, called STEM, can, says Bagalkotkar, “take any core and give you ten different variations.”

Some say FD-SOI won’t scale to 14nm, but STMicroelectronics and LETI have roadmaps showing that, with Germanium added to the channel, it can be scaled to 10nm and 7nm.

Next up, Manfred Horstmann, GlobalFoundries’ Director of Products and Integration in Dresden will focus on SOCs for at 28/20nm. He’s using the term “ET-SOI” with BB (back bias) options. The ET stands for Extremely Thin SOI – it’s the term IBM first used for FD-SOI, but the two terms are now used seemingly interchangeably. As Horstmann notes in the conference abstract, “Being a planar device, ET-SOI devices allow the continuation of previous nodes manufacturing and design experience. Vt-tunability and low GIDL currents are a clear advantage of ET-SOI BB devices for SoC applications, too.”

The approach is supposedly OS- and vendor-agnostic; VISC can handle both ARM and x86 code with a roughly 5% performance hit from translation. This may remind you of Transmeta, whose Code Morphing Engine translated x86 ops into a VLIW-compatible structure that the CPU could execute, but Soft Machines stresses that VISC is actually the opposite approach. Instead of an incredibly complex and difficult translation engine that relies on software execution, the work of extracting ILP and scheduling the code to run across hardware is done on-chip.