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AMD said Kaveri's hUMA architecture has been implemented entirely in hardware, so it should support any operating systems and programming models. Virtualization is supported, as well.

Will hUMA mean CPUs and discrete GPUs can share a unified pool of memory, too? Not quite. When the question came up during the briefing, AMD said hUMA "doesn't directly unify those pools, but it does put them in a unified address space." The company then stressed that bandwidth won't be consistent between the CPU and discrete GPU memory pools—that is, GDDR5 graphics memory will be quicker, while DDR3 system memory will lag behind, so some hoop-jumping will still be required. (As an interesting side note, AMD then added that "people will be able to build APUs with either type of memory [DDR or GDDR] and then share any type of memory between the different processing cores on the APU.")

Maor píše:Akorát mám pořád guláš

people will be able to build APUs with either type of memory [DDR or GDDR] and then share any type of memory between the different processing cores on the APU.

"First, we added another bus to the GPU that allows it to read directly from system memory or write directly to system memory, bypassing its own L1 and L2 caches. As a result, if the data that's being passed back and forth between CPU and GPU is small, you don't have issues with synchronization between them anymore. And by small, I just mean small in next-gen terms. We can pass almost 20 gigabytes a second down that bus. That's not very small in today’s terms -- it’s larger than the PCIe on most PCs!

"Next, to support the case where you want to use the GPU L2 cache simultaneously for both graphics processing and asynchronous compute, we have added a bit in the tags of the cache lines, we call it the 'volatile' bit. You can then selectively mark all accesses by compute as 'volatile,' and when it's time for compute to read from system memory, it can invalidate, selectively, the lines it uses in the L2. When it comes time to write back the results, it can write back selectively the lines that it uses. This innovation allows compute to use the GPU L2 cache and perform the required operations without significantly impacting the graphics operations going on at the same time -- in other words, it radically reduces the overhead of running compute and graphics together on the GPU."

Thirdly, said Cerny, "The original AMD GCN architecture allowed for one source of graphics commands, and two sources of compute commands. For PS4, we’ve worked with AMD to increase the limit to 64 sources of compute commands -- the idea is if you have some asynchronous compute you want to perform, you put commands in one of these 64 queues, and then there are multiple levels of arbitration in the hardware to determine what runs, how it runs, and when it runs, alongside the graphics that's in the system."

yuri.cs píše:

Maor píše:Akorát mám pořád guláš

people will be able to build APUs with either type of memory [DDR or GDDR] and then share any type of memory between the different processing cores on the APU.

=> Lide (bastlici) si budou moci sestavit sve APU systemy vybavene bud s DDR nebo GDDR a pote nechat onu pamet sdilene vyuzivat CPU i GPU v ramci APU.

Takze bude moznost si zvolit mezi DDR nebo GDDR (oboji se vylucuje). Zadny mezistupen to neni, protoze je cela sdilena mezi CPU i GPU. Jestli to budou samostatne moduly (DIMM, etc.), nebo desky s uz naletovanymi je asi jedno. Zajiste si to bastlici nebudou cpat pod IHS do pouzdra... Snad to na Techreportu neprekroutili.

preklad píše:AMD announces that some motherboards can work with an updated BIOS / UEFI, but this may vary depending on model and design, not unlike the situation at the launch of socket AM3 + for FX-series "Bulldozer". However, nothing is yet set in stone.

preklad píše:At the same time revealed that Kaveri is in good shape to be delivered to software developers shortly.